1. Field of the Invention
The present invention relates to a semiconductor device of a virtual ground type and a method for programming a reference cell. Neighboring memory cells share a drain line and a source line in the semiconductor device of the virtual ground type.
2. Description of the Related Art
In a nonvolatile semiconductor device such as a flash memory, a current flowing through a reference cell of a given threshold is used as a reference current. The reference current is compared with a drain current of the memory cell to be read out at the time of reading. The data is judged to be “1” or “0”, depending on whether the drain current of the read-out memory cell is larger than the reference current.
When the data is read out from the memory cell or the reference cell of the memory cell array of the virtual ground type, a voltage is applied to the drain of the cell and a ground potential Vss is set to the source so that a current flows. A pre-charge voltage is applied to a bit line next to the drain line. The leak current can be prevented by supplying the same voltage to the bit line next to the drain line.
It is to be noted that it is impossible to obtain the drain voltage and the pre-charge voltage completely equal to each other. If the data is read out of a memory cell and the next memory cell has an erased state, the current leakage will occur. If the next memory cell has a programmed state, the current will not be leaked due to the electric charge. That is to say, the state of the data in the neighboring memory cell determines whether or not the leak current flows, and this affects the read-out characteristics.
A description will be given in detail with reference to FIGS. 1A and 1B. FIGS. 1A and 1B show a memory cell of a MONOS type having a charge trap layer. Two-bit information is programmable by trapping the charge in both right and left regions of the charge trap layer. A white circle denotes that the charge is not trapped (erased state). A black circle denotes that the charge is trapped (programmed state). As shown in FIG. 1A, when a memory cell (Cell (7) in FIG. 1A) located proximately to the drain line of the memory cell (Cell (0) in FIG. 1A) to be read out has the programmed state, the electrons do not move due to the charge caused by the programmed state and thereby the leak current does not flow. As shown in FIG. 1B, however, if the memory cell (Cell (7)) located proximately to drain line of the memory cell (Cell (0)) to be read out is not programmed, the leak current flows. A bit line located proximately to the pre-charged bit line has a floating state, the leak current flows from the pre-charged bit line to the bit line of the floating state. Furthermore, the leak current also passes from the drain line to the pre-charged bit line on which the voltage is decreased.
Even if the leak current flows, and if the leak current flows in the same manner, the read-out characteristics do not change when all the reference currents are read out. However, with respect to the reference cell, the current is leaked in the reference cell of a specific address.
As shown in FIGS. 1A and 1B, core cells and the reference cells are included in the same cell array. If the reference cell is provided next to the core cell as shown in FIGS. 1A and 1B, the current leakage in the reference cell depends on the state of the core cell.